Been working on this again, while verifying part availability it turned out the 5V SMPS IC I was using is discontinued.

You can see in the older image how it changed because of that. Also, turns out you need pretty big inductors when your max load is much higher than your min load, and been beefing up traces/vias for higher current to support USB-C DRP.


I don't know, I feel like I'm both over and under thinking this CAN stuff. Overthinking because it's just a bonus add-on, underthinking because I'm pretty sure this could be done better.

Trying to figure out the best way to handle the one LVDS signal (an M-LVDS master clock for the system) but also I'm violating like three different design best-practices right now and if I try to move the IC to the backside to eliminate the issues the 12V trace gets in the way.

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